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Advance Information Critical Conduction GreenLineTM SMPS Controller
The MC33364 series are variable frequency SMPS controllers that operate in the critical conduction mode. They are optimized for low power, high density power supplies requiring minimum board area, reduced component count, and low power dissipation. Each narrow body SOIC package provides a small footprint. Integration of the high voltage startup saves approximately 0.7 W of power compared to resistor bootstrapped circuits. Each MC33364 features an on-board reference, UVLO function, a watchdog timer to initiate output switching, a zero current detector to ensure critical conduction operation, a current sensing comparator, leading edge blanking, and a CMOS driver. Protection features include the ability to shut down switching, and cycle-by-cycle current limiting. The MC33364D1 is available in a surface mount SO-8 package. It has an internal 126 kHz frequency clamp. For loads which have a low power operating condition, the frequency clamp limits the maximum operating frequency, preventing excessive switching losses and EMI radiation. The MC33364D2 is available in the SO-8 package without an internal frequency clamp. The MC33364D is available in the SO-16 package. It has an internal 126 kHz frequency clamp which is pinned out, so that the designer can adjust the clamp frequency by connecting appropriate values of resistance. * Lossless Off-Line Startup
MC33364
CRITICAL CONDUCTION GREENLINETM SMPS CONTROLLER
SEMICONDUCTOR TECHNICAL DATA
8 1
D1, D2 SUFFIX PLASTIC PACKAGE CASE 751 (SO-8)
16 1
* * * * * *
Leading Edge Blanking for Noise Immunity Watchdog Timer to Initiate Switching Minimum Number of Support Components Shutdown Capability Over Temperature Protection Optional Frequency Clamp ORDERING INFORMATION
Device MC33364D1 MC33364D2 MC33364D TJ = -25 to +125C 25 125C Operating Temperature Range Package SO-8 SO-8 SO-16
D SUFFIX PLASTIC PACKAGE CASE 751B (SO-16)
PIN CONNECTIONS
MC33364D1 MC33364D2 Zero Current Current Sense Voltage FB Vref 1 2 3 4 (Top View) 8 Line 7 VCC 6 Gate Drive 5 P Gnd
Representative Block Diagram
Line Restart Delay PWM Comparator FB Current Sense Leading Edge Blanking Zero Current Detector S R R Q Vref UVLO Bandgap Reference Vref Gnd Watchdog Timer Gate Thermal Shutdown Frequency Clamp Optional Frequency Clamp (c) Motorola, Inc. 1997 VCC VCC UVLO
MC33364D Zero Current N/C Current Sense Voltage FB N/C Vref N/C Freq Clamp 1 2 3 4 5 6 7 8 (Top View) 13 A VCC 12 P VCC 11 Gate Drive 10 P Gnd 9 A Gnd 16 Line
ZC Det
This device contains 335 active transistors.
This document contains information on a new product. Specifications and information herein are subject to change without notice.
Rev 0
MOTOROLA ANALOG IC DEVICE DATA
1
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DRIVE OUTPUT CURRENT SENSE COMPARATOR ZERO CURRENT DETECTOR VOLTAGE REFERENCE
MAXIMUM RATINGS (TA = 25C, unless otherwise noted.)
ELECTRICAL CHARACTERISTICS (VCC = 12 V, for typical values TA = 25C, for min/max values TJ = -25 to 125C)
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NOTE: ESD data available upon request.
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Restart Diode Current Zero Current Detect Input Current Sense, Compensation, Voltage Feedback, Restart Delay and Zero Current Input Voltage Line Voltage Power Supply Voltage (Operating) Power Supply Voltage (Transient) Rating Symbol VLine PD RJA VCC VCC Vin1 Iin Iin
2
Output Voltage in Undervoltage (VCC = 7.0 V, ISink = 1.0 mA) Output Voltage Fall Time (75% - 25%) (CL = 1.0 nF) Output Voltage Rise Time (25% - 75%) (CL = 1.0 nF) Source Resistance (Drive = 0 V, VGate = VCC - 1.0 V) Sink Resistance (Drive = VCC, VGate = 1.0 V) Feedback Pin to Output Delay Feedback Pin Input Range Built In Offset Input Bias Current (VCS = 0 to 2.0 V) Input Clamp Voltage High State (IDET = 3.0 mA) Low State (IDET = -3.0 mA) Hysteresis (Vin Decreasing) Input Threshold Voltage (Vin Increasing) Reference Undervoltage Lockout Threshold Maximum Vref Output Current Load Regulation (IOut = 0 mA to 5.0 mA) Line Regulation (VCC = 10 V to 20 V) Reference Output Voltage (IOut = 0 mA, TJ = 25C) Storage Temperature Range Operating Ambient Temperature Operating Junction Temperature Power Dissipation and Thermal Characteristics D1 and D2 Suffix, Plastic Package Case 751 Maximum Power Dissipation @ TA = 70C Thermal Resistance, Junction-to-Air D Suffix, Plastic Package Case 751B-05 Maximum Power Dissipation @ TA = 70C Thermal Resistance, Junction-to-Air Characteristic PD RJA Tstg TA TJ
MC33364
-55 to +150
-25 to +125
Regload
-1.0 to +10
Symbol
VO(UV)
Regline
ROH ROL
tDLY
VFB
Vref
VIO
VIH VIL
Vth
Vth
VH
IIB
Value
IO
tr
tf
5.0
150
550 145
450 178
700
5.0
16
20
mW C/W
mW C/W
Unit
mA
mA
C
C
C
V
V
V
V
-0.5
9.0 -0.5
4.90
Min
100
1.1
0.9
10 5
50
-
-
-
-
-
-
-
-
MOTOROLA ANALOG IC DEVICE DATA
10.33 -0.75 0.01 1.24 0.02 5.05 Typ 232 108 200 1.0 4.5 0.3 2.0 28 67 36 11 5 0.03 12 -1.1 5.20 Max 150 400 170 1.4 0.5 1.1 50 70 25 50 50 - - - Unit mV mV mA mV mV A ns ns ns V V V V V V
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TOTAL DEVICE FREQUENCY CLAMP UNDERVOLTAGE LOCKOUT TIMER LEADING EDGE BLANKING
ELECTRICAL CHARACTERISTICS (continued) (VCC = 12 V, for typical values TA = 25C, for min/max values TJ = -25 to 125C)
MOTOROLA ANALOG IC DEVICE DATA
VCC Pin Leakage (VCC = 11 V) VCC Dynamic Operating Current (50 kHz, CL = 1.0 nF) VCC Static Operating Current (VCC = 16 V, Vref = 0) Line Startup Current (VCC = 0 V, VLine = 50 V) Line Pin Leakage (VLine = 575 V) Line Startup Current (VLine = 50 V) (VCC = Vth(on) - 1.0 V) Restart Delay Time Frequency Clamp Control Current Range Frequency Clamp Input Threshold Internal FC Function (pin grounded) Internal FC Function (pin open) Minimum Operating Voltage After Turn-On (VCC Decreasing) Startup Threshold (VCC Increasing) Watchdog Timer Delay to Current Sense Comparator Input (VFB = 2.0 V, VCS = 0 V to 4.0 V step, CL = 1.0 nF) Characteristic
MC33364
tPHL(in/out)
VShutdown
Symbol
ICC Lkg
IControl
Vth(FC)
Vth(on)
ILine
ILine
ILine tDLY
fmax
fmax
tDLY
ICC
300
400
200
Min
1.5 -
6.0
0.5
5.0
6.5
30
90
14
-
-
2.75 3.0
544
8.5 100
564
126
410
250
Typ
2.0
7.6
10
32
70
15
Max
800
700
160
700
110
4.5 -
8.5
12
70
12
16
-
Unit
kHz
kHz
mA
mA
mA ms
A
A
A
s
ns
V
V
V
3
MC33364
Figure 1. Drive Output Waveform
30 25 OUTPUT VOLTAGE (V) 20 15 10 5.0 0 -5.0 5.0 s/DIV VCC = 14 V CL = 1000 pF TA = 25C t DLY, WATCHDOG TIME DELAY ( s) 500 VCC = 14 V
Figure 2. Watchdog Timer Delay versus Temperature
450
400
350
300 -55
-25
0
25
50
75
100
125
TA, AMBIENT TEMPERATURE (C)
Figure 3. Reference Voltage versus Temperature
16 12 VCC = 14 V 8.0 4.0 5.0 I CC, SUPPLY CURRENT (mA) VFB , VOLTAGE FEEDBACK THRESHOLD CHANGE (mV) 6.0
Figure 4. Supply Current versus Supply Voltage
4.0 Circuit of Figure 7 TA = 25C 2.0
-4.0 -55
-25
0
25
50
75
100
125
0 4.0
6.0
8.0
10
12
14
16
TA, AMBIENT TEMPERATURE (C)
VCC, SUPPLY VOLTAGE (V)
Figure 5. Transient Thermal Resistance
1000 R JA(t), THERMAL RESISTANCE JUNCTION-TO-AIR (C/W) D Suffix 16 Pin SOIC Td , PROGRAMMED DEAD TIME ( sec) 1000 D Suffix 16 Pin SOIC TA = 25C VCC = 14 V
Figure 6. Dead Time versus Input Current
100
100
10
1.0
10 0.01
0.1
1.0 t, TIME (s)
10
100
0.1 0.1
1.0
10
100
1000
Iin, CURRENT SOURCED INTO PIN 8 (A)
4
MOTOROLA ANALOG IC DEVICE DATA
MC33364
FUNCTIONAL DESCRIPTION
INTRODUCTION With the goal of reducing the size and cost of off-line power supplies, there is an ever increasing demand for an economical method of obtaining a regulated galvanically isolated dc output voltage using a control which operates directly from the ac line. This data sheet describes a monolithic control IC that was specifically designed for power supply control with a minimal number of external components. It offers the designer a simple cost effective solution to obtain the benefits of off-line power regulation.
Figure 7. Functional Block Diagram
C5 10
1N4006 D2 92 to 270 Vac EMI Filter D1 1N4006
1N4006 D4
D3 1N4006
Line
T1 C3 20 VCC 1N4934 R1 56 D5 R5 47 k R6 47 K C4 .001 D6 MURS160T3 Q1 MTD1N60
MC33364
R2 22 k Zero Current Detect Zero Current 0.3/ 0.25 V R RQ SQ En R Q S Leading Edge Blanking 44 K 2.0 V 1.5 V 14 K 5.0 k VCC 5.0 V + Reference En UVLO Q R Timer + 15/7.6
+
D8 MBRS340T3 C5 300 6.0 V 2 Amp
P VCC
Gate Drive 470 R4 P Gnd D7 1N4148 R12 100 C9 .01
Frequency Clamp C2 0.01
5.0 V 4.0 K 10 V 2.0 V 3.0 A 10 pF
Current Sense Voltage FB
R7 2.2 U3 MOC8102 R3 1.2 K 5 4 R9 39 k 3 U2 TL431
R8 430 R10 14 k
1 2 C7 10 C8 330 pF R11 10 k
UVLO
Vref
C10 0.1
1 2
D9 1N4148 R13 100
A Gnd
V
O
+ 2.5
R10 R11
)1
Operating Description The MC33364 contains many of the building blocks and protection features that are employed in modern high performance current mode power supply controllers. Referring to the block diagram in Figure 7, note that this device does not contain an oscillator. A description of each of the functional blocks is given below. Zero Current Detector The MC33364 operates as a critical conduction current mode controller, whereby output switch conduction is initiated by the Zero Current Detector and terminated when the peak inductor current reaches the input threshold level. The Zero Current Detector initiates the next on-time by
setting the RS Latch at the instant the inductor current reaches zero. This critical conduction mode of operation has two significant benefits. First, since the MOSFET cannot turn-on until the inductor current reaches zero, the output rectifier's reverse recovery time becomes less critical allowing the use of an inexpensive rectifier. Second, since there are no deadtime gaps between cycles, the ac line current is continuous thus limiting the peak switch to twice the average input current The Zero Current Detector indirectly senses the inductor current by monitoring when the auxiliary winding voltage falls below 0.25 V. To prevent false tripping, 50 mV of hysteresis is provided. The Zero Current Detector input is internally
MOTOROLA ANALOG IC DEVICE DATA
5
MC33364
protected by two clamps. The upper 0.7 V clamp prevents input overvoltage breakdown while the lower -0.7 V clamp prevents substrate injection. An external resistor must be used in series with the auxiliary winding to limit the current through the clamps to 5.0 mA or less. Current Sense Comparator and RS Latch The Current Sense Comparator RS Latch configuration used ensures that only a single pulse appears at the Drive Output during a given cycle. The inductor current is converted to a voltage by inserting a ground-referenced sense resistor in series with the source of output switch. This voltage is monitored by the Current Sense Input and compared to the divided down feedback voltage. The internal feedback voltage divider is limited to 1.5 V maximum. Therefore the maximum peak switch current is: I pk(max) Figure 8. Frequency Clamp Circuit
5.0 V 3.0 A 10 pF Gate Drive Signal 2.0 V 0 = Disable FC Output to PWM latch
Frequency Clamp
4.0 k 2.0 V
Sense The Current Sense Input to Drive Output propagation delay is typically 232 nS. Timer A watchdog timer function was added to the IC to eliminate the need for an external oscillator when used in stand alone applications. The Timer provides a means to automatically start or restart the preconverter if the Drive Output has been off for more than 410 microseconds after the inductor current reaches zero. Undervoltage Lockout The MC33364 has a 5.0 V internal reference brought out to Pin 6 (D Suffix) or Pin 4 (D1 and D2 Suffixes) and capable of sourcing 10 mA typically. It also contains an Under Voltage Lockout (UVLO) circuit which suppresses the Gate output at Pin 11 if the VCC supply voltage drops below 7.6 V typical. Restart Delay A restart delay function is provided to allow hiccup mode fault protection in case of a short circuit condition and to prevent the SMPS from repeatedly trying to restart after the input line voltage has been removed. When power is first applied, the VCC bypass capacitor is charged through a constant current source. The Restart Delay turns off the high voltage startup MOSFET when VCC reaches the startup threshold level. The Restart Delay turns on the high voltage MOSFET after VCC has dropped below 4.5 V. If the SMPS output is short circuited, the transformer winding, which provides the VCC voltage to the MC33364, will be unable to sustain VCC. The restart delay prevents the high voltage startup transistor within the IC from maintaining the voltage on the VCC pin bootstrap capacitor. After VCC drops below the UVLO threshold in the SMPS, the SMPS switching transistors are held off for the time programmed by the restart delay circuit. In this manner, the SMPS switching transistor is operated at a very low duty cyle, preventing destruction. If the short circuit fault is removed, the power supply system will turn on by itself in a normal startup mode after the restart delay has timed out
+ R1.5 V
Output Switching Frequency Clamp In normal operation, the MC33364 operates the flyback transformer primary inductance in the critical mode. That is, the inductor current ramps to a peak value, ramps down to zero, then immediately begins ramping positive again. The peak current is programmed by the current sense resistance value. If the output load is reduced from full load to a standby load or no load condition, the switching frequency can increase to hundreds of kilohertz. Because regulatory agency EMI limits for allowed conducted current decreases as the switching frequency increases beyond 150 kHz, this may be an undesireable operating condition. The Output Switching Frequency Clamp remedies this situation to minimize EMI generated in this operating region. The internal frequency clamp circuit in the MC33364D1 and MC33364D programs a minimum off time, forcing discontinuous mode operation and limiting the operating frequency to less than 126 kHz. The MC33364D2 does NOT contain a frequency clamp circuit. The Output Switching Frequency Clamp function in the MC33364D can be disabled by connecting the FC input, Pin 8, to ground. The clamp frequency can be set externally by sinking or sourcing a current into the pin of up to 100 microamperes. Output The IC contains a CMOS output driver specifically designed for direct drive of power MOSFETs. The Drive Output is capable of up to 1500 mA peak current with a typical rise and fall time of 50 nS with a 1.0 nF load. Additional internal circuitry has been added to keep the Drive Output in a sinking mode whenever the Undervoltage Lockout is active. This characteristic eliminates the need for an external gate pull-down resistor. The totem-pole output has been optimized to minimize cross-conduction current during high speed operation. Design Example Design an off-line Flyback converter according to the following requirements: Output Power: 12 W Output: 6.0 V @ 2 Amperes Input voltage range: 90 Vac - 270 Vac, 50/60 Hz The operation for the circuit shown in Figure 9 is as follows: the rectifier bridge D1-D4 and the capacitor C1 convert the ac line voltage to dc. This voltage supplies the primary winding of the transformer T1 and the startup circuit
6
MOTOROLA ANALOG IC DEVICE DATA
MC33364
in U1 through Pin 8. The primary current loop is closed by the transformer's primary winding, the TMOS switch Q1 and the current sense resistor R7. The switch Q1 is driven from Pin 6 of U1 through the resistor R4 and the diode D7. The resistor R4 smooths the switch-on of Q1. The diode D7 ensures a fast switching-off. The resistors R5, R6, diode D6 and capacitor C4 create a clamping network that protects Q1 from spikes on the primary winding. The network consisting of capacitor C3, diode D5 and resistor R1 provides a VCC supply voltage for U1 from the auxiliary winding of the transformer. The resistor R1 makes VCC more stable and resistant to noise. The resistor R2 reduces the current flow through the internal clamping and protection zener diode of the Zero Crossing Detector (ZCD) within U1. C3 is the decoupling capacitor of the supply voltage. The resistor R3 provides bias current for the optoisolator's transistor. The diode D8 and the capacitor C5 rectify and filter the output voltage. The device U2 drives the primary side through the optoisolator to make the output voltage stable. The output voltage information is delivered to U2 by a resistive divider that consists of resistors R10 and R11. The resistor R9 and the capacitors C7, C8 provide frequency compensation of the feedback loop. Since the critical conduction mode converter is a variable frequency system, the MC33364 has a built-in special block to reduce switching frequency in the no load condition. This block is named the "frequency clamp" block. MC33364 used in the design example has an internal frequency clamp set to 126 kHz. However, optional versions with a disabled or variable frequency clamp are available. The frequency clamp works as follows: the clamp controls the part of the switching cycle when the MOSFET switch is turned off. If this "off-time" (determined by the reset time of the transformer's core) is too short, then the frequency clamp does not allow the switch to turn-on again until the defined frequency clamp time is reached (i.e., the frequency clamp will insert a dead time). There are several advantages of the MC33364's startup circuit. The startup circuit includes a special high voltage switch that controls the path between the rectified line voltage and the VCC supply capacitor to charge that capacitor by a limited current when the power is applied to the input. After a few switching cycles the IC is supplied from the transformer's auxiliary winding. After VCC reaches the undervoltage lockout threshold value, the startup switch is turned off by the undervoltage and the overvoltage control circuit. Because the power supply can be shorted on the output, causing the auxiliary voltage to be zero, the MC33364 will periodically start its startup block. This mode is named "hiccup mode". During this mode the temperature of the chip rises but remains protected by the thermal shutdown block. During the power supply's normal operation, the high voltage internal MOSFET is turned off, preventing wasted power, and thereby, allowing greater circuit efficiency. Since a bridge rectifier is used, the resulting minimum and maximum dc input voltages can be calculated: The maximum average input current is: I in
+
P out nV in(min)
12 W + [0.8(127 V)] + 0.118 A
where n = estimated circuit efficiency. A TMOS switch with 600 V avalanche breakdown voltage is used. The voltage on the switch's drain consists of the input voltage and the flyback voltage of the transformer's primary winding. There is a ringing on the rising edge's top of the flyback voltage due to the leakage inductance of the transformer. This ringing is clamped by the RCD network. Design this clamped wave for an amplitude of 50 V. Add another 50 V to allow a safety margin for the MOSFET. Then a suitable value of the flyback voltage may be calculated: V flbk
+ VTMOS * Vin(max) * 100 V + 600 V * 382 V * 100 V + 118 V + Vin(min) + 127 V
Since this value is very close to the Vin(min), set: V flbk
The Vflbk value of the duty cycle is given by: max V 127 + V )flbk + [127 V ) V V] + 0.5 V 127 in(min) flbk
The maximum input primary peak current: I ppk I in + [ 2max] + 0.2(0.118 A) + 0.472 A 0.5
Choose the desired minimum frequency fmin of operation to be 70 kHz. After reviewing the core sizing information provided by a core manufacturer, a EE core of size about 20 mm was chosen. Siemens' N67 magnetic material is used, which corresponds to a Philips 3C85 or TDK PC40 material. The primary inductance value is given by: Lp
+
max V I ppk
in(min) f min
0.5(127 + (0.472 A)(70V)kHz) + 1.92 mH
The manufacturer recommends for that magnetic core a maximum operating flux density of: B max
+ 0.2 T
The cross-sectional area Ac of the EF20 core is: Ac
+ 33.5 mm2 + Nppppk Ac
LI LI
The operating flux density is given by: B max
V
in(min)
dc
+ +
2 xV
in(min)
ac
+ +
2 (90 Vac)
+ 127 V + 382 V
From this equation the number of turns of the primary winding can be derived: np p ppk + BmaxAc
V
in(max)
dc
2 xV
in(max)
ac
2 (270 Vac)
MOTOROLA ANALOG IC DEVICE DATA
7
MC33364
The AL factor is determined by: 2 L p B maxA c Lp + A L n 2p 2 Lp I ppk
+
+
0.2 T 33.5 E-6 m 2 .00192 H (0.472 A)
2 2
+ 105 nH
The voltage of the optoisolator collector node sets the peak current flowing through the power switch during each cycle. This pin will be connected to the feedback pin of the MC33364, which will directly set the peak current. Starting on the secondary side of the power supply, assign the sense current through the voltage-sensing resistor divider to be approximately 0.25 mA. One can immediately calculate the value of the lower and upper resistor: R lower 2.5 V + R11 + Vref I(TL431) + 0.25 mA + 10 k
From the manufacturer`s catalogue recommendation the core with an AL of 100 nH is selected. The desired number of turns of the primary winding is:
np
+
Lp A L
12
R upper
+
(0.00192 H) (100 nH)
12
+ 139 turns
+ R10 + Vout * Vref(TL431) I div V 2.5V + 6.00.25*mA + 14 k
div
The number of turns needed by the 6.0 V secondary is (assuming a Schottky rectifier is used): ns
+ Vs )Vfwd
1- max n p in(min) 6.0 V
max V
The value of the resistor that would provide the bias current through the optoisolator and the TL431 is set by the minimum operating current requirements of the TL431. This currernt is minimum 1.0 mA. Assign the maximum current through the branch to be 5 mA. That makes the bias resistor value equal to: R bias
+
)0.3 V 1 *0.5 139 +7 turns
0.5 127 V max)n p )
The auxiliary winding to power the control IC is 16 V and its number of turns is given by: naux
+ (Vaux ) Vfwd)(1 *
max(V
0.9 V)(1 * + (16 V )[0.5(127 V)] 0.5)139 + 19 turns The approximate value of rectifier capacitance needed is: C1
in(min)
5.0 mA The MOC8102 has a typical current transfer ratio (CTR) of 100% with 25% tolerance. When the TL431 is full-on, 5 mA will be drawn from the transistor within the MOC8102. The transistor should be in saturated state at that time, so its collector resistor must be R V 0.3 + VrefI * Vsat + 5.0 5.0*mA V + 940 W collector
+ RS + Vout * [VrefI(TL431) ) VLED] LED 6.0 V * [2.5V ) 1.4V] + + 420 W [ 430 W
+ tVoff(Iin) + (5 m sec)(0.118 A) + 11.8 mF 50 V
ripple
LED Since a resistor of 5.0 k is internally connected from the reference voltage to the feedback pin of the MC33364, the external resistor can have a higher value R ext )(R ) collector + (5.0 k)(940) + R3 + (R(Rint* (R ) ) 5.0 k * 940 int collector
where the minimum ripple frequency is 2 times the 50 Hz line frequency and toff, the discharge time of C1 during the haversine cycle, is assumed to be half the cycle period. Because we have a variable frequency system, all the calculations for the value of the output filter capacitors will be done at the lowest frequency, since the ripple voltage will be greatest at this frequency. The approximate equation for the output capacitance value is given by: C5
1157 W 1200 W This completes the design of the voltage feedback circuit. In no load condition there is only a current flowing through the optoisolator diode and the voltage sense divider on the secondary side. The load at that condition is given by: R
+
[
+ (f
I out )(V ) min rip
2A + (70 kHz)(0.1 V) + 286 mF
Determining the value of the current sense resistor (R7), one uses the peak current in the predesign consideration. Since within the IC there is a limitation of the voltage for the current sensing, which is set to 1.2 V, the design of the current sense resistor is simply given by: R7 1.2 + IVcs + 0.472VA + 2.54 W [ 2.2 W ppk
+ (I noload
V out LED
) Idiv) V + (5.0 mA6.0 0.25 mA) + 1143 W )
C out ) 1 + (2p)(1143)(300 mF) + 0.46 Hz
The output filter pole at no load is: f pn
+ ( 2p R
1 noload
The error amplifier function is provided by a TL431 on the secondary, connected to the primary side via an optoisolator, the MOC8102. 8
MOTOROLA ANALOG IC DEVICE DATA
MC33364
In heavy load condition the ILED and Idiv is negligible. The heavy load resistance is given by: R heavy Gc
out The output filter pole at heavy load of this output is
+ Vout + 6.0 V + 3.0 W I 2.0 A
1 C heavy out
+ 20 log
fc f ph
The gain in absolute terms is: Ac
kHz * A + 20 log 14177 * 23.82 dB + 14.14 dB
f pn
+ (2p R
1 + (2p)(3)(300 mF) + 177 Hz )
+ 10(Gc 20) + 10(14.14 20) + 51
The gain exhibited by the open loop power supply at the high input voltage will be:
Now the compensation circuit elements can be calculated. The output resistance of the voltage sense divider is given by the parallel combination of resistors in the divider: R
A
+
V
in max in max
* Vout
2 Ns
(V
)(V error)(Np)
V) (7) + (382 V * 6.0V)(139) (382 V)(1.2 2
+ Rupper || Rlower + 10 k || 14 k + 5833 W R9 + (Ac) (R ) + 29.75 k [ 30 k in
in C8
The maximum recommended bandwidth is approximately: fc
+ 15.53 + 23.82 dB
+ +
1 2p (A c) (R ) (f c) in
+ 382 pF [ 390 pF
+ fs min + 70 5kHz + 14 kHz 5
The compensation zero must be placed at or below the light load filter pole: C7 1 2p (R9) (f pn)
The gain needed by the error amplifier to achieve this bandwidth is calculated at the rated load because that yields the bandwidth condition, which is:
+ 11.63 mF [ 10 mF
MOTOROLA ANALOG IC DEVICE DATA
9
MC33364
Figure 9. 12 W Power Supply
1N4006 D2 92 to 270 Vac EMI Filter D1 1N4006
1N4006 D4
C1 10
D3 1N4006
Line
T1 C3 20 VCC 1N4934 R1 56 D5 R5 47 k R6 47 K C4 .001 D6 MURS160T3 Q1 MTD1N60
U1 MC33364
R2 22 k Zero Current Detect Zero Current 0.3/ 0.25 V R RQ SQ En R Q S Leading Edge Blanking 44 K 2.0 V 1.5 V 14 K 5.0 k VCC 5.0 V + Reference En UVLO Q R Timer + 15/7.6
+
D8 MBRS340T3 C5 300 6.0 V 2 Amp
P VCC
Gate Drive 470 R4 P Gnd D7 1N4148 R12 100 C9 .01
Frequency Clamp C2 0.01
5.0 V 4.0 K 10 V 2.0 V 3.0 A 10 pF
Current Sense Voltage FB
R7 2.2
R8 430
U3 MOC8102
R3 1.2 K 5 4 R9 30 k 3 1 2
R10 14 k
UVLO
Vref
C10 0.1
D9 1N4148 R13 100
U2 TL431
A Gnd
1 2
C7 10 C8 330 pF R11 10 k
Line Regulation IO = 930 mA Line Regulation Vin = 115 Vrms Output Ripple Efficiency
Vin = 90 to 270 Vac IO = 110 to 1100 mA Vin = 115 Vac, IO = 1100 mA Vin = 115 Vac, IO = 1100 mA
= 78 mV or 6.5% = 103 mV or 8.6% 600 mVpp 72.9%
10
MOTOROLA ANALOG IC DEVICE DATA
MC33364
Figure 10. Universal Input Battery Charger
J2 1 2 Output 12 V @ 0.8 Amp max Input Voltage Range 90 - 270 Vac, 50/60 Hz
R13 22 k
R12 82 k
R11 10 k
5 VS 6 CSB
Gnd 4 R10 0.25 R9 100
5.1 V R8 4.7 k D8 B2X84C5V1LT1 C5 100 F C6 1.0 F R7 100 9 T1 5 4 7
CMP 3 U2 7 VCC MC33341 CTA 2 CSA 1 8 DO
C7 33 nF
D7 1N4148
D6 MURS320T3 2 1
3 C4 1.0 nF
2 D5 MURS 160T3 Q1 MTD1N60E R4 47 k 5 4
R4 47 k
R5 47 k
U3 MOC8102
D3 1N4148 R1 220 C2 20 F 18 V D2 B2X84C18LT1 R3 22 k 6 Gate 1 ZCD 7 VCC C1 D1 B250R F1 T 0.2 A 8 Line 10 f 350 V 2 CS U1 MC33364D1 Gnd 5 FB 3 C3 Vref 4 0.1 F
12 J1 Line
T1 = 139 Turns #28 Awg, primary winding 2 - 3 7 Turns, Bifilar 2 x #26 Awg, output winding 9 - 7 19 Turns #28 Awg, auxiliary winding 4 - 5 on Philips EF20-3C85 core gap for a primary inductor of 1.92 mH.
MOTOROLA ANALOG IC DEVICE DATA
11
MC33364
OUTLINE DIMENSIONS
D1, D2 SUFFIX PLASTIC PACKAGE CASE 751-05 (SO-8) ISSUE S A
8
D
5
C
E
1 4
H
0.25
M
B
M
h B C e A
SEATING PLANE
X 45 _
NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. DIMENSIONS ARE IN MILLIMETERS. 3. DIMENSION D AND E DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE. 5. DIMENSION B DOES NOT INCLUDE MOLD PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 TOTAL IN EXCESS OF THE B DIMENSION AT MAXIMUM MATERIAL CONDITION. DIM A A1 B C D E e H h L MILLIMETERS MIN MAX 1.35 1.75 0.10 0.25 0.35 0.49 0.18 0.25 4.80 5.00 3.80 4.00 1.27 BSC 5.80 6.20 0.25 0.50 0.40 1.25 0_ 7_
q
L 0.10 A1 0.25 B
M
CB
S
A
S
q
-A-
D SUFFIX PLASTIC PACKAGE CASE 751B-05 (SO-16) ISSUE J
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. MILLIMETERS MIN MAX 9.80 10.00 3.80 4.00 1.35 1.75 0.35 0.49 0.40 1.25 1.27 BSC 0.19 0.25 0.10 0.25 0_ 7_ 5.80 6.20 0.25 0.50 INCHES MIN MAX 0.386 0.393 0.150 0.157 0.054 0.068 0.014 0.019 0.016 0.049 0.050 BSC 0.008 0.009 0.004 0.009 0_ 7_ 0.229 0.244 0.010 0.019
16
9
-B-
1 8
P
8 PL
0.25 (0.010)
M
B
S
G F
K C -T-
SEATING PLANE
R
X 45 _
M D
16 PL M
J
0.25 (0.010)
TB
S
A
S
DIM A B C D F G J K M P R
12
MOTOROLA ANALOG IC DEVICE DATA
MC33364
Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. "Typical" parameters which may be provided in Motorola data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. Motorola does not convey any license under its patent rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part. Motorola and are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal Opportunity/Affirmative Action Employer.
MOTOROLA ANALOG IC DEVICE DATA
13
MC33364
Mfax is a trademark of Motorola, Inc. How to reach us: USA / EUROPE / Locations Not Listed: Motorola Literature Distribution; P.O. Box 5405, Denver, Colorado 80217. 1-303-675-2140 or 1-800-441-2447 Customer Focus Center: 1-800-521-6274 MfaxTM: RMFAX0@email.sps.mot.com - TOUCHTONE 1-602-244-6609 ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park, Motorola Fax Back System - US & Canada ONLY 1-800-774-1848 51 Ting Kok Road, Tai Po, N.T., Hong Kong. 852-26629298 - http://sps.motorola.com/mfax/ HOME PAGE: http://motorola.com/sps/ JAPAN: Nippon Motorola Ltd.: SPD, Strategic Planning Office, 4-32-1, Nishi-Gotanda, Shinagawa-ku, Tokyo 141, Japan. 81-3-5487-8488
14
MC33364/D MOTOROLA ANALOG IC DEVICE DATA


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